The purpose of this topic is not only about drawing attention towards Ogma’s ideas/framework which currently is named SPH (from Sparse Predictive Hierarchies) but mostly to discuss how to apply SPH to SDR-based processing, and I’m thinking at both:
- HTM tools, specifically Spatial Pooler and Temporal Memory as encoder/decoder
- Associative Memory tools as in Diadic/Triadic memory and possibly any other bitpair maps.
Why?
One reason is Ogma already produced some interesting results with quite limited hardware like Raspberry Pi-s and even microcontrollers,
The other reason being HTM feels kind of stuck at TM and SP - they seem to work but I haven’t seen very explicit proposals to further expand (or assemble) these basic blocks in more complex architectures.
To start with here are a couple links detailing the core concepts in SPH:
-
SPH Presentation
(30 slides as PDF) - A paper draft
- And the github repository with code and references to the above documents.
One main difference between Ogma’s system vs HTM is their is not based on SDRs as data representation, but on a similar, yet very different structure called CSDRs. I won’t delve into differences, because the papers above are much more clear, and what I am going to propose here is using SDRs instead of Ogma’s CSDRs in a SPH-like system.
One of the most interesting chart describing SPH is at the page 5 on the paper, or page 14 of the slide presentation.
I don’t know how to pull out an image from a PDF, so you’ll have to look there to make sense of what follows:
That image contains a layered stack of encoder-decoder pairs, layer 1 being the bottom-most encoder-decoder pair and layer N (usually N=3 or greater) is placed at the top of the SPH hierarchy
From what @ericlaukien kindly explained, there is no inherent constraint on what “encoder” and “decoder” blocks are made of, they experimented with a vast array/kinds of encoders, while for decoders they used mainly a (relatively) simple logistic regression.
One key feature (not obvious in the ladder schematic) is
each upper layer operates at half the time rate of its underlying layer, (mostly 1/2 time steps). That means increasing number of layers expands the time span of the whole system, without a linear increasing in computing costs. They call this “exponential memory”, in the sense each upper layer “sees” changes over twice the time span of the layer below it.
Now how can SPH architecture could be build with HTM bricks:
- Use a Spatial Pooler as encoder.
- Use a variation of Temporal Memory as decoder.
Will further discuss how TM needs to be altered in order to be usable in a SPH, because by default TM predicts its own next input while in SPH it has to predict the future underlying encoder output(s)
Without further ado one should also notice that a triadic memory might be good decoder too, while as encoder can be tested a FlyHash encoder that simply “translates” X input bits into X/2 output bits.