Returning to the question of Temporal Memory performance (speed and permanence space), the HTM-scheme data structures may be of interest.
The HTM-scheme Temporal Memory algorithm uses 4-byte synapses, and implements:
- multiple basal and apical segments per cell
- multiple cortical columns (with parallel compute, thread/cc)
- “hexagonal” minicolumn/cc topology, enabling use of distance between pre/post synaptic cells
- multiple connectivity (presynaptic cell of any synapse can be anywhere, any cc or layer)
Memory requirements are 4B/synapse (24-bit pre-synaptic cell, 8-bit permanence),
48B/segment, plus 30% (guesstimate) for “AxonTrees” (connectivity Hashtables).
So for a TM layer modelling L4 of a cortical column, with 3K cells, 20 segments/cell, 1K synapses/cell, memory use is ~20MB.
1000 cortical columns (TBT 
) => 20GB