I'm considering doing a follow-up project on this topic. Unfortunately Sebastian is not on this forum, so I'd like to ask @subutai what he believes should come next. According to the paper, the basic modules of spatial pooling and temporal memory have been implemented successfully, but the learning mechanisms are not directly able to be mapped to the hardware.
In this work, was learning implemented in a digital processor outside of the HICANN chip wafers? In any case, the Plasticity Processing Unit (PPU) that was mentioned is elaborated on here.
The first extension that comes to mind, following the sequence in HTM School as well, is topology. Is any part of the sensorimotor integration theory mature enough to offer algorithms ready for hardware implementation?
Is the implementation of the port (eg. the pyNN code) available and any other supporting material?