Webinar - Project Trillium: Optimizing ML Performance for any Application
Date: 19 July, 2018
Time: 9:00am (GMT+1) & 5:00pm (GMT+1)
Designed for unmatched versatility and scalability, Project Trillium enables a new era of ultra-efficient machine learning (ML) inference. Join Arm to discover why AI is moving to the edge, and how to select an ML solution to address your use case, from IoT to servers.
Join experts from Arm’s machine learning group to gain insights that will help you navigate the path intelligently. During this webinar you will learn:
• Features and benefits of Arm’s new Machine Learning (ML) and Object Detection (OD) processors, their applicability for different markets and the options for incorporating them in differentiating SoC designs
• How advances in compute processing power and AI algorithms have pushed applications, training, and inference to edge devices
• How to choose the best ML software and hardware combination to address each use case
I have fanaticised about farms of Raspberry PIs as my compute engine for a while now.
The memory data lines with ARM processors can be 8,16,32 bits wide. I’m not sure if 64 bit is available. Anyway when I inquired into memory access speeds with the Pi board I found it is only about 100 megabytes per second, or 25 million 32 bit floats per second. Presumably they are using 8 bit data lanes to save money. Unfortunate, I also don’t like the 64 bit cores ARM have created. If they had not heavily integrated SIMD into the CPU they could have packed many, many cores on one chip minus SIMD but still with the basic floating point unit per core.
ARM is an IP core. If there was a particular configuration that made sense you can code with it and blast it into gate arrays if you can find a backer.
No I don’t want to roll my own. Nor do I want to write my own programming language. Even though that would solve a multitude of little annoyances. Who has the time? And so I must make do. I am even having to eat the dog food now by learning javascript. Such is life.
